IEEE - CAS Bangalore Chapter, India     CAS Chapter - Region 10
Institute of Electrical and Electronics Engineers - Circuits and Systems Society
Goals: To conduct seminars, workshops, and other events pertaining to all aspects of electronic circuits and systems

Events - 2014
External links open in a New Window
December
One-day tutorial on Introduction to Linux
Conducted in cooperation with UniTI (TI India University Program) and IEEE CAS Bangalore Chapter
Date: December 27, 2014
Time: 9.30 AM - 5.00 PM
Venue: Texas Instruments India, Bagmane Tech Park, CV Raman Nagar, Bangalore 560093

There is no fee to attend this tutorial and is primarily aimed at the participants of Three-day Hands-on Workshop on Embedded Applications with Beaglebone Black Beaglebone Black during January 10-12, 2015. You must send an e-mail to khaja.smd@ti.com with

  • Your complete name and contact details (Address, Phone, Email)
  • Your background (Student/Professional)
  • Your IEEE membership information
  • Your participation will be confirmed through email with further details.

    Abstract: This one-day tutorial aims to cover: a brief history of Unix and Linux, a user perspective of Unix, Hands-on use of tcsh commands and General-purpose vs Embedded Linux.

    Seminar on Signal Processing Meets Optics: Theory, Design and Inference for Computational Imaging
    Conducted by PragaTI (TI India Technical University) in cooperation with IEEE CAS Bangalore Chapter
    Date: December 18, 2014
    Time: 1.30 PM - 2.30 PM: Computational Photography
    Speaker: Dr Kaushik Mitra
    Venue: Texas Instruments India, Bagmane Tech Park, CV Raman Nagar, Bangalore 560093

    Registration: This seminar is open to IEEE members and non-members and doesn't carry any registration fee, but confirmation on participation is compulsory by registering at http://goo.gl/forms/cC1E11veCA before Decmber 16. Your participation will be confirmed and further instructions will be sent. Please take your seat a few minutes before the seminar begins, and sign the attendance sheet & fill out a feedback form.

    Abstract: For centuries, imaging devices have been based on the principle of 'pinhole projection', which directly captures the desired image. However, it has recently been shown that by co-designing the imaging optics and processing algorithms, we can obtain Computational Imaging (CI) systems that far exceed the performance of traditional cameras. Despite the advances made in designing new computational cameras, there are still many open issues such as:
    1) lack of a proper theoretical framework for analysis and design of CI camera
    2) lack of camera designs for capturing the various dimensions of light with high fidelity and 3) lack of proper use of data-driven methods that have shown tremendous success in other domains.
    In this talk, I will address the above mentioned issues. First, I will present a comprehensive framework for analysis of computational imaging systems and provide explicit performance guarantees for many CI systems such as light field and extended-depth-of-field cameras. Second, I will show how camera array can be exploited to capture the various dimensions of light such as spectrum and angle. Capturing these dimensions leads to novel imaging capabilities such as post-capture refocussing, hyper-spectral imaging and natural image retouching.
    Finally, I will talk about how various machine learning techniques such as robust regression and matrix factorization can be used for solving many imaging problems.

    About the speaker: Kaushik Mitra will be joining the Electrical Engineering department of IITM as an assistant professor. Before that he was a postdoctoral research associate in the Electrical and Computer Engineering department of Rice University. His research interests are in computational imaging, computer vision and machine learning.
    He earned his Ph.D. in Electrical and Computer Engineering from the University of Maryland, College Park, where his research focus was on the development of statistical models and optimization algorithms for computer vision problems.

    November
    One-day training on UNIX Shell
    Conducted in cooperation with UniTI (TI India University Program) and IEEE CAS Bangalore Chapter
    Date: November 4, 2014
    Time: 9.00 AM - 5.00 PM
    Venue: Texas Instruments India, Bagmane Tech Park, CV Raman Nagar, Bangalore 560093

    There is no fee to attend this training if you are a member of IEEE. However, prior registration is mandatory. You must send an e-mail to khaja.smd@ti.com with

  • Your complete name and contact details (Address, Phone, Email)
  • Your background (Student/Professional)
  • Your IEEE membership information
  • Your registration will be confirmed through telephone and email. For confirmed registrants, we will send more details.

    Abstract: A Three-day Hands-on Workshop on Embedded Applications with Beaglebone Black Beaglebone Black is planned during January 10-12, 2015. A background in UNIX is needed to appreciate this training. If you have not used UNIX before and wish to get an exposure, here is an opportunity. This 1-day long training on Unix Shell is being conducted on November 5, 2014. Refer to registration details.

    May
    Seminar on Leveraging Periodicity in Human Mobility for Next Place Prediction
    Conducted in cooperation with PragaTI (TI India Technical University), IEEE Bangalore Section and IEEE CAS Bangalore Chapter
    Speaker: Bhaskar Prabhala, Penn State University
    Date: May 29, 2014
    Time: 11.00 AM - 12.00 Noon
    Venue: Texas Instruments India, Bagmane Tech Park, CV Raman Nagar, Bangalore 560093

    Registration: This seminar is open to IEEE members and non-members. There is no registration fee to attend this seminar, but you must confirm your participation by writing to khaja.smd@ti.com before May 27. Your participation will be confirmed and further instructions will be sent to you. Please take your seat a few minutes before the seminar begins, and sign the attendance sheet & fill out a feedback form.

    Abstract: Periodic transitions from place to place are inherent in human movements. Through visual examination we detect these periodic movements in traces of user tracking data. However such user tracking data sets tend to be sparse and incomplete. In addition, periodic movements are surrounded by noise: transitions to and from less frequently visited places and transitions to one of a kind visits. We present algorithms leveraging techniques and models to detect periodicity in individual user movements. Our algorithms predict a user's next place given only the current context of time-stamp and location. We apply these algorithms to real user mobility data sets. Prediction accuracy depends on the ratio of periodic movements to noise in user traces.

    We trace our submission to Nokia's Mobility Data Challenge for next place prediction task, which took the second place. Aggregated average accuracy of predictions across all users is the sole criteria for the Challenge. We consolidated the techniques from our submission to two algorithms: PeriodicaB and PeriodicaS. We apply these algorithms to MDC data set as well as the WTD data set from UCSD study. We analyze accuracy of predictions for individual users as well as the aggregated average accuracy across all users. These results and the analysis were presented at the IEEE Wireless Communications and Networking Conference 2014. Current research aims to generate end to end trajectories for users in the trace data sets using periodicity and place semantics. By overlaying these trajectories we can determine intersection points that result in models for opportunistic mobile networks.

    About the speaker: Bhaskar Prabhala is a researcher in the Institute for Networking and Security Research (http://nsrc.cse.psu.edu/index.html) at Penn State. His research interests include modeling, mobility prediction, and communication services in opportunistic mobile networks. Before returning to Penn State, Bhaskar set up the R&D Center for Royal Philips/NXP Semiconductors in Shanghai, China in 2006 and led the center as the General Manager until 2009. Before then, he was the General Manager of R&D Center (San Jose, California) in Philips Semiconductors for five years.

    Previously, Bhaskar was vice president of engineering at Syntax (acquired by LSI Logic in December 2000), a leading provider of advanced server solutions for corporations requiring cross-platform access to mission critical information. He was at Sun Microsystems for eight years in software development management positions and as a director of networking software. He moved to Silicon Valley in 1979 and joined Intel as a member of the 286 processor software architecture team. He was part of the faculty in Computer Science Department at Indiana University (Bloomington) from 1977 to 1979.

    Bhaskar graduated from Pennsylvania State University with an M.S. in Computer Science.

    April
    Seminar on On-Chip Electrostatic Discharge Protection: Essentials and Research Opportunities
    Conducted in association with IEEE CAS Bangalore Chapter by PragaTI (TI India Technical University)
    Date: April 16, 2014
    Time: 3:00 PM — 4:00 PM
    Venue: Texas Instruments India, C.V. Raman Nagar, Bagmane Tech Park, Bangalore
    Speaker: Mayank Shrivastava (IISc, Bangalore)

    Registration: This seminar is open to everyone and doesn't carry any fee, but prior registration is mandatory. Register by sending a mail to Udit Khanna (khanna.udit@ti.com) before 5.00pm on April 14, 2014. Your registration will be confirmed by April 15 and further instructions will be sent. Please take your seat a few minutes before the seminar begins, and sign the attendance sheet & fill out a feedback form.

    Abstract: ESD is a serious reliability threat to semiconductor chips, however chip technology, process, device and circuit co-design requirements for ESD protection is often not known to researchers exploring device, materials, process and design options for future nano-electronic products. This talk will provide an introduction to the essential concepts of on-chip ESD protection devices and circuits. Moreover, research options for researchers in the area of materials, nano-electronic devices, circuits and compact modelling will be highlighted. Finally, an outlook on the ESD device research in the advanced CMOS technologies will be given.

    Prof.Mayank ShrivastavaAbout the speaker: Prof. Mayank Shrivastava has a wide experience and interest in the field of Nanoscale device design and modelling, ESD devices and circuits, device-circuit co-design, drain extended MOS devices and electrothermal modelling. He has taken several positions within the semiconductor industry. During 2008 and again in 2010, he was a Visiting Scholar at Infineon Technologies AG, Munich, Germany. During 2010-2011, he worked for Infineon Technologies, East Fishkill, NY, USA and later Intel, Mobile & Communications Group, USA.
    From Oct. 2011 till Aug. 2013 he was with Intel, Mobile & Communications Group, Munich Germany. Since September 2013 he is with Department of ESE at the Indian Institute of Science Bangalore.



    TIIEC2014 - Texas Instruments India Educators' Conference
    Industry-Academia Confluence for Education & Innovation
    Organized by TI India University Program, in collaboration with IEEE Bangalore Section and IEEE CAS Society, Bangalore Chapter.
    Date: April 4-5, 2014
    Venue: TI India Bangalore Campus, Bagmane Techpark, C.V.Raman Nagar, Bangalore 560093
    Download Conference Poster (PDF 660 KB)
    Texas Instruments India Educators' Conference 2014

    About the conference: TI India University program is organizing an Educators' Conference to bring academicians and industry together on one platform. The conference will provide opportunities for learning and knowledge sharing for all participants. In addition to formal paper presentations and invited talks, the conference will showcase student project exhibits and provide opportunities for networking.

    Call for Papers
    The main themes of the conference are Education and Innovation. Please refer to the poster announcement for themes, areas and application domains on which papers are invited.
    Weblinks
    Important dates
    Last date for submission of Presentation Foils - Feb 8, 2014
    Announcement of short listed presentations - March 10, 2014
    Contact details
    email: tiiec2014@list.ti.com
    Phone: 080-25099453, 080-25048335


    March
    Research in Analog/RF systems at IISc, Bangalore
    Conducted in association with IEEE CAS Bangalore Chapter by PragaTI (TI India Technical University)
    Date: March 26, 2014
    Time: 2:00 PM — 4:00 PM
    Venue: TR-1, TI India, BTP Campus, Bangalore
    Abstract: This talk contains a series of presentations by Prof. Gaurab Banerjee and his students.

    Registration: This seminar is open to everyone and doesn't carry any fee, but prior registration is mandatory. Register by sending a mail to Udit Khanna (khanna.udit@ti.com) before 5.00pm on March 24, 2014. Your registration will be confirmed by March 25 and further instructions will be sent. Please take your seat a few minutes before the seminar begins, and sign the attendance sheet & fill out a feedback form.

    Prof. Gaurab Banerjee
    Topic: Introduction to Researches in Analog/RF Systems in IISc
    Abstract: The talk will provide a brief overview of the current and planned research in Analog/RF systems in the ECE Department at the Indian Institute of Science, Bangalore.

    Prof.Gaurab Banerjee, IIScGaurab Banerjee received the B.Tech (Hons.) degree in Electronics and Electrical Communication Engineering from the Indian Institute of Technology, Kharagpur, India, and the Ph.D. degree in Electrical Engineering from the University of Washington, Seattle, in 1997 and 2006, respectively.
    In 1999, he joined Intel Corporation, Hillsboro, OR, to design analog and mixed-signal circuits for the first Pentium-4 microprocessor. Between 2001 and 2007, he was a research scientist with Intel Labs, working on CMOS based analog, mixed-signal and RF circuits for wireless and wire-line communication systems. Between 2007 and 2010, he was a staff engineer with Qualcomm Inc., Austin, TX, working on RFIC design for mobile broadcast video applications. Since May 2010, he has been an Assistant Professor in the Department of Electrical Communication Engineering, Indian Institute of Science, Bangalore, India.
    His research interests are in analog and RF integrated circuits and systems for communication and sensor applications. He has published more than 20 papers on semiconductor devices and circuits and has about 10 patents granted or pending. Between 2008 and 2010, Dr. Banerjee was an Associate Editor of IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I. He has also served as a reviewer for many IEEE journals and on the technical program committees of many conferences. Dr. Banerjee is a National Talent Search Scholar of India, and a Senior Member of IEEE.

    Vishal Khatri
    Topic: Cognitive radio based dynamic spectrum access (DSA) techniques
    Abstract: Cognitive radio based dynamic spectrum access (DSA) techniques allows for efficient utilization of spectrum. Spectrum sensing is a key enabler for Dynamic Spectrum Access. Traditional implementation methods for spectrum sensing have focused on a serial scan of a narrow band or a wide band RF spectrum where the computational onus lies on the digital baseband . In this work we propose a parallel multi band RF spectrum sensing to alleviate the digital baseband computational overhead. One of the key challenges is the design of a frequency synthesizer which can generate a comb of uniformly LO frequencies with acceptable phase noise.

    Vishal Khatri, IIScVishal Khatri did his M.Sc. (Hons.) in Physics and B.E (Hons.) in Electronics and Instrumentation from BITS Pilani Goa Campus. He has worked as a summer intern at Indira Gandhi Center for Atomic Research, Kalpakkam. He was also an intern at Texas Instrument India where he worked on DFM aware bridge pair extraction for manufacturing test development. His areas of interest are RF and Mixed signal circuit design and BIST for RF.

    Immanuel Raja
    Topic: Highly Linear, Re-Configurable Transmitter
    Abstract: Traditional integrated transmitters are inherently narrowband. This work is targeted towards designing a highly linear, re-configurable transmitter which can operate over a wide range of carrier frequencies with variable bandwidths. This work explores the use of digital-intensive architectures to meet the requirements. Cognitive radios, Software Defined Radios, millimeter-wave radios are potential applications for this work.

    Immanuel Raja, IIScImmanuel Raja received the Bachelor of Engineering degree from MIT Campus of Anna University in Electronics and Communication Engineering in 2011. Since then he has been a research scholar at the Analog and RF Systems Lab, IISc. His research interests are in transmitter and power amplifier designs for RF and millimeter wave frequencies and on-chip BIST techniques.

    Zaira Zahir
    Topic: Frequency Synthesis for wideband applications.
    Abstract: There is a scarcity of spectrum as the number of users is increasing every day. This has resulted in active research in areas like software defined radios(SDR), cognitive radios(CR) and mm wave radios, requiring the use of wideband and reconfigurable receivers. Designing of such wideband and reconfigurable receivers is a challenging task and one of the main challenges lies in the synthesis of a wide range of frequencies for these receivers. A frequency synthesizer is required to down-convert a received RF signal to base band or to some intermediate band and correspondingly to up convert it in a transmitter. Apart from covering wide range of frequencies synthesizer needs to have very low Phase Noise and fast settling time.

    Zaira Zahir, IIScZaira Zahir received her B.E (Hons.) in Electrical and Instrumentation Engineering from Birla Institute Of Technology and Science , Pilani, Rajasthan in 2008.From 2008 to 2011 she was working with ST Microelectronics, Greater Noida in Analog and Mixed Signal Group .In August 2011 she joined Electrical Communication Engineering Department of Indian Institute Of Science, Bangalore as a PhD Scholar. Her research interests are focused on CMOS RF/analog circuits and frequency synthesizers for wideband applications.

    Javed GS
    Topic: ADC based Sub-systems for Sensor Interfaces
    Abstract: Sensor interfaces are dominated with the presence of high accuracy, high resolution ADCs in the backend. In most occasions, the complete dynamic range is not utilized in its operation. Designing a subsystem which works with a sensor interface closely and works with a lower resolution ADC and in a smaller area is challenge. This work tries to meet the requirements. Cognitive Radio, Software Defined Radios and Capacitance Sensors are potential applications.

    Javed GS, IIScJaved GS received the B.E. degree in electronics and communication engineering from M S Ramaiah Institute of Technology(MSRIT), Bangalore, India in 2008. He is currently working towards the Ph.D degree in electrical communication engineering from the Analog / RF Systems and IC design lab, Indian Institute of Science(IISc), Bangalore, India. He has worked in Bharat Electronics Limited(BEL), a defence public sector unit (MoD) from 2008 to 2010, on MIL-grade electronics sub-system design for air-borne surveillance systems. His doctoral work focuses on the design of low-power sensor interfaces and data converters.


    January
    4. Seminar on Signal and Image Processing Research Activity at Spectrum Lab
    Conducted in association with IEEE CAS Bangalore Chapter by PragaTI (TI India Technical University)
    Date: January 24, 2014
    Time: 3.00 PM — 4.00 PM
    Venue: TR-1/2, Texas Instruments India, BTP Campus, Bangalore
    Speaker: Dr. Chandra Sekhar Seelamantula (Dept of EE, IISc, Bangalore)

    Abstract: In this talk, there will be an overview of the various signal and image processing research activities going on in IISc lab. Some key and latest results from IISc lab will be presented related to

    (i) Speech and audio compression
    (ii) Speech and vocals time and pitch scaling
    (iii) Image de-noising
    (iv) Biomedical image processing
    (v) Image reconstruction in optical imaging.
    The prime focus will be on the results and their impact and seek to identify points of potential collaboration.

    Dr.Chandra Sekhar SeelamantulaAbout the speaker: Chandra Sekhar Seelamantula (M'99) was born in 1976 in Gollepalem, Andhra Pradesh, India. He obtained a Bachelor of Engineering (B.E.) degree in 1999 with a Gold medal from the University College of engineering, Osmania University, India, with a specialization in Electronics and Communication Engineering. He obtained a direct Ph.D. degree in 2005 from the Indian Institute of Science, Department of Electrical Communication Engineering, with a thesis titled, "Time varying Signal Models: Envelope and Frequency Estimation with Applications to Speech and Music Signal Compression."
    During his Ph.D., he also specialized in the development of auditory-motivated signal processing models for speech and audio applications. During April 2005 - March 2006, he worked as a Technology Consultant for M/s. ESQUBE Communication Solutions Private Limited, Bangalore, and developed proprietary audio coding solutions. In April 2006, he joined the Biomedical Imaging Group, Ecole polytechnique fédérale de Lausanne, Switzerland, as postdoctoral fellow and specialized in the field of Image Processing, Optical-Coherence Tomography, Holography, Splines, and Sampling Theories. Since July 2009, he is Assistant Professor at the Department of Electrical Engineering, Indian Institute of Science, Bangalore.

    Registration: This seminar is open to everyone and doesn't carry any fee, but prior registration is mandatory. Register by sending a mail to Udit Khanna (khanna.udit@ti.com) before 5.00pm on January 22, 2014. Your registration will be confirmed and further instructions will be sent. Please take your seat a few minutes before the seminar begins, and sign the attendance sheet & fill out a feedback form.

    3. One-day workshop on Introduction to MSP430 Microcontroller
    Organized by TI India University Program, in cooperation with IEEE CAS Bangalore Chapter
    Date: January 18, 2014
    Time: 9:30 AM—5.30 PM
    Venue: Texas Instruments India campus, Bagmane Tech Park, C.V. Raman Nagar, Bangalore 560093

    About the workshop: MSP430 LaunchPad is an easy-to-use development tool intended for beginners and experienced users alike for creating microcontroller-based applications. MSP430 is an ultra low-power 16-bit microcontroller family from Texas Instruments. In this workshop, the intention is to expose the participants to the concepts and programming of the MSP430 for low power applications. It is expected that the participants have a basic working knowledge of the microcontrollers.

    Registration: The workshop carries a registration fee of Rs 500/- per student. Please contact Vaibhav Ostwal (ostwalvaibhav@ti.com) for clarifications. Participants must compulsorily register online at http://bit.ly/msp430-workshop before January 17, 2014.

    2. Seminar on Phase-based computing using self-sustaining nonlinear oscillators
    Conducted in association with IEEE CAS Bangalore Chapter by PragaTI (TI India Technical University)
    Date: January 9, 2014
    Time: 3.00 PM - 4.00 PM
    Venue: TR-1/2, Texas Instruments India, BTP Campus, Bangalore
    Speaker: Prof. Jaijeet Roychowdhury (EECS, University of California, Berkeley)

    Registration: This seminar is open to everyone and doesn't carry any fee, but prior registration is mandatory. Register by sending a mail to Udit Khanna (khanna.udit@ti.com) before 5.00pm on January 5, 2014. Your registration will be confirmed by January 7 and further instructions will be sent. Please take your seat a few minutes before the seminar begins, and sign the attendance sheet & fill out a feedback form.

    Abstract: In the 1950s, Eiichi Goto and John von Neumann proposed an innovative scheme for digital computation that used the phase of undulating waveforms to encode logic. However, circuitry for phase logic has so far been difficult to miniaturize, or to run at room temperature.
    We show how virtually any self-sustaining nonlinear oscillator can be used to implement phase logic -- thus opening the door to the use of many kinds of nano-scale oscillators in diverse domains, such as micro-electronics, nano-devices and biology. Further, we show that phase logic has inherent noise and robustness advantages over conventional level-based logic. We argue that these advances make phase logic a strong contender for robust, low-power next generation computation.

    Prof.Jaijeet RoychowdhuryAbout the speaker: Prof.Jaijeet Roychowdhury is a Professor of EECS at the University of California at Berkeley. He received a Bachelor's degree in electrical engineering from the Indian Institute of Technology, Kanpur, India, in 1987, and a Ph.D. degree in electrical engineering and computer science from UC Berkeley in 1993. From 1993 to 1995, he was with the Computer-Aided Design (CAD) Laboratory, AT&T Bell Laboratories, Allentown, PA. From 1995 to 2000, he was with the Communication Sciences Research Division, Bell Laboratories, Murray Hill, NJ. From 2000 to 2001, he was with CeLight Inc. (an optical networking startup), Silver Spring, MD. From 2001-2008, he was with the Electrical and Computer Engineering Department and the Digital Technology Center at the University of Minnesota in Minneapolis.
    Roychowdhury's professional interests include the analysis, simulation and design of electronic, biological and mixed-domain systems. He was cited for Extraordinary Achievement by Bell Laboratories in 1996. Over the years, he has authored or co-authored seven best or distinguished papers at ASP-DAC, DAC, and ICCAD.
    He was an IEEE Circuits and Systems Society Distinguished Lecturer during 2003-2005 and served as Program Chair of IEEE's CANDE and BMAS workshops in 2005. He has served on the Technical Program Committees of ICCAD, DAC, DATE, ASP-DAC and other EDA conferences, on the Executive Committee of ICCAD, on the Nominations and Appointments Committee of CEDA, and as an Officer of CANDE. He is a Fellow of the IEEE.


    1. Seminar on Abstractions and Formalisms for Analog CAD
    Conducted in association with IEEE CAS Bangalore Chapter by PragaTI (TI India Technical University)
    Date: January 9, 2014
    Time: 4.00 PM - 5.00 PM
    Venue: TR-1/2, Texas Instruments India, BTP Campus, Bangalore
    Speaker: Dr. Pallab Dasgupta (Dept. of Computer Sc. & Engg, IIT Kharagpur)

    Registration: This seminar is open to everyone and doesn't carry any fee, but prior registration is mandatory. Register by sending a mail to Udit Khanna (khanna.udit@ti.com) before 5.00pm on January 5, 2014. Your registration will be confirmed by January 7 and further instructions will be sent. Please take your seat a few minutes before the seminar begins, and sign the attendance sheet & fill out a feedback form.

    Abstract: Traditionally analog circuit design has been a niche area driven by the domain knowledge and experience of specialist designers. Digital circuits, which are based on Boolean logic and finite state machines, are predominantly synthesized using CAD tools. Attempts to automate analog design flows have been largely unsuccessful in the past, mainly due to the large disconnect between high level formalisms like hybrid automata and low level transistor netlists, and the computational complexity in formally relating the two levels of abstraction. On the other hand, the increasing trend of using analog circuit components in large digital integrated circuits, is pushing the frontiers of analog CAD, particularly considering the verification challenges. It is becoming imperative to be able to capture the analog design intent at a high level of abstraction which is compatible with the formalisms used in digital design. This talk will focus on this trend and outline some of the research that has been taking place at IIT Kharagpur in this area.

    Dr.PallabDasgupta.jpgAbout the speaker: Dr. Pallab Dasgupta is a Professor at the Dept. of Computer Sc. & Engg, IIT Kharagpur, and also the current Associate Dean (Sponsored Research) at IIT Kharagpur. His research interests include Formal Verification, Artificial Intelligence and VLSI. He has over 150 research papers and 3 books in these areas. He leads the Verification group at the Department of Computer Science and Engineering, IIT Kharagpur (http://www.facweb.iitkgp.ernet.in/~pallab/forverif.html ) which has research collaborations with several industries, including Intel, Synopsys, General Motors, Texas Instruments, IBM, Freescale, SRC and Google.
    Dr. Dasgupta received the IBM Faculty award, the IESA Technomentor award and the young scientist medals of INSA and INAE. He is a Fellow of the Indian National Academy of Engineering and a Fellow of the Institutions of Electronics and Telecommunication Engineers.


    T O P