IEEE - CAS Bangalore Chapter, India     CAS Chapter - Region 10
Institute of Electrical and Electronics Engineers - Circuits and Systems Society
Goals: To conduct seminars, workshops, and other events pertaining to all aspects of electronic circuits and systems

Events - 2016
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December
A Hands-on Approach to on Design and Verification of Analog and Digital circuits
Organized by: IEEE CAS Bangalore Chapter in cooperation with PragaTI (TI India Technical University)
Instructors: Professionals from industry will provide the training
Date: December 22-23, 2016
Time: 9.30 AM - 5.00 PM
Venue: Texas Instruments India, Bagmane Tech Park, CV Raman Nagar, Bangalore 560093

Registration: This workshop is open to IEEE members and non-members.
Registration Fee: The fee includes refreshments and working lunch on both days.
Working professionals: Rs 4000/-
(10% discount for IEEE members with valid membership as on Dec 23, 2016, certificate will be provided)
Teacher/Student sponsored by Engineering College: Rs 2000/-
(10% discount for IEEE members with valid membership as on Dec 23, 2016, certificate will be provided)
For self-sponsored faculty: Rs 500/-
Who are interested in learning (you must clearly mention that your college cannot sponsor you in a mail you send, note that no certificate will be provided)
For research scholars: Rs 500/-
Who intend to teach (no certificate will be provided)

Last Date to register: Please fill out the online registration form at https://goo.gl/CRlN2d by December 5, 2016.

Cheque/DD should be payable to IEEE Circuits and Systems Bangalore Chapter and to be sent to:
C.P. Ravikumar, Secretary, IEEE CAS Bangalore Chapter, Texas Instruments (India), Bagmane Tech Park, CV Raman Nagar, Bangalore 560093.
You must scan your cheque/DD and send an electronic copy to khaja.smd@ti.com before December 10, 2016 to hold your seat. Please take your seat a few minutes before the start time, and sign the attendance sheet & fill out the feedback form.

About the course: To be able to contribute effectively in the role of an electronics professional, it is important to have a firm grounding of basics. No matter how advanced your projects are, not having a firm footing on foundations will be a handicap. In this two-day class, we will get into basics of circuit design and verification. We will use a hands-on approach to delve into these topics. Participants will be expected to have taken a course on electronic devices/circuits and digital design. We will take a problem-solving approach to revise fundamentals.
It is expected that participants will actively participate through discussion and problem solving. Public-domain tools will be employed during the hands-on sessions. This class is recommended for trainers and teachers from engineering colleges who teach undergraduate courses. It is also useful for Masters and Ph.D. students who are aspiring to become teachers. The workshop will also provide networking opportunity for teachers and industry professionals.


November
A Seminar on Updates from Embedded Systems Week 2016 conference
IoT Security, Approximate Computation, Learning from Biology…
Conducted in cooperation with PragaTI (TI India Technical University) and IEEE CAS Bangalore Chapter
Speaker: Dr.C.P.Ravikumar (TI India)
Date: 4 November 2016
Time: 3:00PM To 4:00PM
Venue: LC-1, TI India BTP (Bagmane Techpark), CV Raman Nagar, Bangalore 93

Registration: This seminar is open to IEEE members and non-members. There is no registration fee to attend this seminar. Register by writing to khaja.smd@ti.com or call +91 80 25099727. Please enrol only if you are seriously interested in participating. Please take your seat a few minutes before the seminar begins, and sign the attendance sheet & fill out a feedback form.

Abstract: This talk will capture some key learnings from ESWEEK 2016 conference. In particular, it will touch upon the following topics:
(a) Security in Internet of Things
(b) Approximate Computation
(c) Learning from Biology

About the speaker: Dr. C.P. Ravikumar is with Texas Instruments India as a Senior Technologist in VLSI Test. Before joining TI, he served on the faculty of the Department of Electrical Engineering at IIT Delhi as a Professor. He has published over 150 papers in international conferences and journals. He has served as the technical program chair for VLSI Design Conference and the VLSI Design and Test Symposium. He has also served as the member of the program committee for several conferences, including HiPC (High Performance Computing).
He is the recipient of SIGDA student scholarship award, best paper award (VLSI Design conference) and best student paper award (VLSI Design conference). He is a senior member of IEEE, Fellow of the Indian Microelectronics Society, and the past secretary of VLSI Society of India. C.P. Ravikumar is the associate editor of "IEEE Transactions on Circuits and Systems" (2014-). He is the current Honorary Secretary of IEEE CAS Society, Bangalore Chapter.
More information on instructor can be found at cpravikumar.tripod.com


October
2. A Seminar on Advanced Light Control Applications using DLP® MEMS Devices
Organized by IIIT Bangalore and IEEE CAS Bangalore Chapter
Speakers: Sanjeev Kumar M & Sreeram Subramanian (TI India)
Date: October 21, 2016
Time: 11.00am - 12.30pm
Venue: IIIT Bangalore 560012

Registration: This seminar is open to IEEE members and non-members, and useful to faculty/research scholars who are interested in using DLP in innovative projects. Please fill out the online registration form at http://goo.gl/P1aGyQ to enrol. The seminar is of 1-hr duration, and the speakers will spend 30 minutes subsequently with faculty/research scholars who are interested in using DLP in innovative projects.

Abstract: Digital Micromirror Devices (DMD) were the first MEMS devices invented at Texas Instruments in 1987. A DLP® (Digital Light Processing) chip was introduced by Texas Instruments and its first application was in the area of overhead projectors. DLP projectors have revolutionized cinema. Both the DLP chip and its inventor Dr. Hornbeck were awarded Oscars for the impact this technology has had on motion pictures. DLP projectors are routinely used in showbiz, including the opening and closing ceremonies of Olympic games. Numerous innovative applications of DLP chips have emerged in the last decade, including medical applications, computer vision, 3-D cinema, volumetry, and so on. This seminar will give an overview of what DLP® devices are and how they function.
We will take a designer's perspective and discuss various parameters to consider when choosing a DLP® device for a specific application. We will provide examples of various applications where DLP devices are deployed. We will also familiarize the audience with the various EVMs and tools that we make available on ti.com that can be used to evaluate and prototype applications based on DLP.

About the Speakers:

Sanjeev Kumar M Sanjeev Kumar M is an application engineer with Advanced Light Control business group within DLP business unit, helping customers worldwide in designing their products using DLP chipsets and tools. Sanjeev has been with DLP Products group and Texas Instruments for more than 10 years. He has conducted many seminars and trainings to help customers.

Sreeram Subramanian Sreeram Subramanian is a Member, Group Technical Staff with Texas Instruments DLP® Products and designs software, firmware and tools that go with the DLP EVMs for Advanced Light Control. Sreeram has been with TI for about 17 years and specializes in the area of embedded system design.


1. A Seminar on Advanced Light Control Applications using DLP® MEMS Devices
Organized by IEEE CAS Bangalore Chapter in cooperation with IEEE Bangalore Section, Indian Institute of Science and Texas Instruments India
Speakers: Sanjeev Kumar M & Sreeram Subramanian (TI India)
Date: October 20, 2016
Time: 3.00pm - 4.00pm
Venue: Seminar Hall, DESE, Indian Institute of Science, Bangalore

Registration: This seminar is open to IEEE members and non-members, and useful to faculty/research scholars who are interested in using DLP in innovative projects. Please fill out the online registration form at http://goo.gl/n0nvek to enrol. The seminar is of 1-hr duration. After the seminar, the speakers will spend 30 minutes with faculty/research scholars who are interested in using DLP in innovative projects.
Coffee will be served during 2.30pm - 3.00pm.

Abstract: Digital Micromirror Devices (DMD) were the first MEMS devices invented at Texas Instruments in 1987. A DLP® (Digital Light Processing) chip was introduced by Texas Instruments and its first application was in the area of overhead projectors. DLP projectors have revolutionized cinema. Both the DLP chip and its inventor Dr. Hornbeck were awarded Oscars for the impact this technology has had on motion pictures. DLP projectors are routinely used in showbiz, including the opening and closing ceremonies of Olympic games. Numerous innovative applications of DLP chips have emerged in the last decade, including medical applications, computer vision, 3-D cinema, volumetry, and so on. This seminar will give an overview of what DLP® devices are and how they function.
We will take a designer's perspective and discuss various parameters to consider when choosing a DLP® device for a specific application. We will provide examples of various applications where DLP devices are deployed. We will also familiarize the audience with the various EVMs and tools that we make available on ti.com that can be used to evaluate and prototype applications based on DLP.

About the Speakers:

Sanjeev Kumar M Sanjeev Kumar M is an application engineer with Advanced Light Control business group within DLP business unit, helping customers worldwide in designing their products using DLP chipsets and tools. Sanjeev has been with DLP Products group and Texas Instruments for more than 10 years. He has conducted many seminars and trainings to help customers.

Sreeram Subramanian Sreeram Subramanian is a Member, Group Technical Staff with Texas Instruments DLP® Products and designs software, firmware and tools that go with the DLP EVMs for Advanced Light Control. Sreeram has been with TI for about 17 years and specializes in the area of embedded system design.


September
A One-day Workshop on Understanding MSP430 Architecture using MSP430 Launchpad
Orgaized by IEEE CAS Bangalore Chapter in cooperation with Texas Instruments (India)
Instructor: Dr.C.P.Ravikumar (Texas Instruments, India)
Date: 24 September, 2016 (Postponed from 17 September, 2016)
Time: 9.30 AM - 5.00 PM
Venue: Texas Instruments India, Bagmane Tech Park, CV Raman Nagar, Bangalore 560093

Registration: A nominal registration fee of Rs 2000/- per participant will be applicable and it will cover lunch and refreshments and a certificate of participation. A discount of 10% will be applicable to teachers from engineering colleges. Cheque/DD to be made out to "IEEE CAS Bangalore Chapter" payable at Bangalore.
You must confirm your participation by enrolling in the program at the following Website https://docs.google.com/forms/d/e/1FAIpQLSeKAyaYr-nkxfpu-fVIeEcBL48K8HhOaieza8MmgWCp3PHu8A/viewform?c=0&w=1 on or before Sep 3. There is a limited number of seats and we will use first-come first-served policy for teachers, research scholars, M.Tech and B.Tech students, in that order. If your registration is confirmed, you will be required to submit the details of the DD/cheque – this step must be completed by Sep 8 to hold your registration.
Note: The registration link will be available till 17 September 2016.

Abstract: In this One-day program intended for teachers from engineering colleges, we will use the MSP430 launchpad to understand the internal architecture of the MSP430 microcontroller. In the first half of the class, an overview of MSP430 architecture will be provided. The second half will include hands-on exercises using MSP430 launchpad and Code Composer Studio. Both C and assembly language programming will be covered. While the workshop is mainly intended for teachers, we will also permit research scholars and M.Tech students.
The tutorial will cover:

  • Changing face of VLSI Architecture
  • Microcontrollers/DSP/Microprocessors
  • RISC/CISC architectures
  • SOC Platforms
  • MSP430 CPU Architecture
  • IO Interfaces supported by MSP430
  • Instruction set of MSP430 and Assembly language programming using MSP430
  • TI's Code Composer Studio

About the instructor: Dr. C.P. Ravikumar is with Texas Instruments India as a Senior Technologist in VLSI Test. Before joining TI, he served on the faculty of the Department of Electrical Engineering at IIT Delhi as a Professor. He has published over 150 papers in international conferences and journals. He has served as the technical program chair for VLSI Design Conference and the VLSI Design and Test Symposium. He has also served as the member of the program committee for several conferences, including HiPC (High Performance Computing).
He is the recipient of SIGDA student scholarship award, best paper award (VLSI Design conference) and best student paper award (VLSI Design conference). He is a senior member of IEEE, Fellow of the Indian Microelectronics Society, and the past secretary of VLSI Society of India. C.P. Ravikumar is the associate editor of "IEEE Transactions on Circuits and Systems" (2014-). He is the current Honorary Secretary of IEEE CAS Society, Bangalore Chapter.
More information on instructor can be found at cpravikumar.tripod.com


July
IEEE CAS: Two-day Refresher Course on Basic Electronics for Engineering Teachers
Conducted by IEEE CAS Bangalore Chapter in association with Texas Instruments (India)
Instructor: C.P. Ravikumar
Date: July 16 and 23, 2016
Time: 9.30 AM - 5.00 PM
Venue: Texas Instruments India, Bagmane Tech Park, CV Raman Nagar, Bangalore 560093

Registration: A course fee of Rs 2000/- per day will be applicable. You may enroll for either or both of the days of the program. A 10% discount is applicable to members of IEEE. The course fee includes lunch and refreshments. A certificate of participation will be mailed to the participants after the completion of the course.Please fill out the online registration form at https://docs.google.com/forms/d/1FkjoLOU1hXxRff5RBotIQ6LVdEYnHKSov_2uZEMr8fI/viewform?c=0&w=1&usp=mail_form_link.
Cheque/DD should be payable to IEEE Circuits and Systems Bangalore Chapter and to be sent to:
C.P. Ravikumar, Secretary, IEEE CAS Bangalore Chapter, Texas Instruments (India), Bagmane Tech Park, CV Raman Nagar, Bangalore 560093.
You must scan your cheque/DD and send an electronic copy to khaja.smd@ti.com before July 11 to hold your seat.

Abstract: This course is intended for young faculty who are teaching / planning to teach a basic course on electronics to undergraduate students. Research Scholars who are planning to apply to take up an academic career may also apply. You must enroll online before July 8. Your participation will be confirmed by July 12, 2016. The purpose of the course is to provide a quick overview of important concepts and lay emphasis on what is important from an industry perspective. Problem solving and discussions will be encouraged. Aspects of soft skills for new teachers will also be discussed.

About the instructor: Dr. C.P. Ravikumar is the Director of Technical Talent Development at Texas Instruments, India. He is also an adjunct faculty in the Department of Electrical Engineering at IIT Delhi. Before joining TI, he was a Professor in the Department of Electrical Engineering at IIT Delhi. His princiipal areas of research interest are VLSI architecture, embedded systems, and electronic design automation. He has published over 200 papers in international conferences and journals. He has won 3 best paper awards in IEEE conferences and has 3 US patents to his credit. He has edited 15 books in the areas of VLSI design and Embedded Systems.
He has delivered keynote talks and tutorials in reputed national as well as international conferences. He has delivered over 200 seminars in engineering colleges across India. He is a senior member of IEEE, Fellow of the Indian Microelectronics Society, and the past secretary of VLSI Society of India. He established VLSI Design and Test Symposium and served as its General Chair for 15 years.
He has served on the organizing committees of numerous conferences in various capacities. C.P. Ravikumar has served on the ediorial the associate editor of "IEEE Transactions on Circuits and Systems" (2014-2015). He is the current Honorary Secretary of IEEE CAS Society, Bangalore Chapter.

A Seminar on Ultra-low-Power System Design for Internet of Everything

Conducted by PragaTI (TI India Technical University) in association with IEEE CAS Bangalore Chapter
Speaker: Anantha P. Chandrakasan
Vannevar Bush Professor of Electrical Engineering and Computer Science
Department Head, MIT Electrical Engineering and Computer Science
Date: 7 July 2016
Time: 2.00-3.00 PM
Venue: Texas Instruments India, Bagmane Tech Park, CV Raman Nagar, Bangalore 560093

Registration: This seminar is open to IEEE members and non-members. There is no registration fee to attend this seminar. Please take your seat a few minutes before the seminar begins, and sign the attendance sheet & fill out a feedback form.

Abstract: Advances in energy-efficient circuit and system design have enabled sensor nodes to be embedded in virtually everything - from devices implanted in the human body to sensors seamlessly integrated in the environment. These systems have made an impact on important applications including medical monitoring, assistive devices, personal safety, energy management, and secure information access. For example, a Time-of-Flight camera coupled with a vision processor can detect obstacles and greatly enhance the environment awareness for the visually impaired. A system-level view is needed to minimize energy consumption of sensing, processing, energy conversion, and communication. Energy savings is achieved through the use of data statistics in adapting computation, dedicated architectures, parallelism and ultra-low-voltage operation, deep learning techniques, and effective duty cycling. Energy harvesting should be an integral part of the sensor design including the use of biological sources when appropriate. Emerging device solutions such as devices with Molybdenum Disulfide or hybrid cell based systems will provide unique capabilities in realizing the vision of Internet of Everything. The talk will discuss energy reduction techniques, and also present the challenges ahead including the need for efficient security solutions.

About the speaker: Anantha P. Chandrakasan received the B.S, M.S. and Ph.D. degrees in Electrical Engineering and Computer Sciences from the University of California, Berkeley, in 1989, 1990, and 1994 respectively. Since September 1994, he has been with the Massachusetts Institute of Technology, Cambridge, where he is currently the Vannevar Bush Professor of Electrical Engineering and Computer Science. He was a co-recipient of several awards including the 2007 ISSCC Beatrice Winner Award for Editorial Excellence and the ISSCC Jack Kilby Award for Outstanding Student Paper (2007, 2008, 2009). He received the 2009 Semiconductor Industry Association (SIA) University Researcher Award and the 2013 IEEE Donald O. Pederson Award in Solid-State Circuits. In 2015 he was elected to the National Academy of Engineering. His research interests include ultra-low-power circuit and system design, energy harvesting, energy efficient RF circuits, and hardware security. He is a co-author of Low Power Digital CMOS Design (Kluwer Academic Publishers, 1995), Digital Integrated Circuits (Pearson Prentice-Hall, 2003, 2nd edition), and Sub-threshold Design for Ultra-Low Power Systems(Springer 2006). He is an IEEE Fellow. He has served in various roles for the IEEE ISSCC including Program Chair, Signal Processing Sub-committee Chair, and Technology Directions Sub-committee Chair. He has been the Conference Chair of ISSCC since 2010. He was the Director of the MIT Microsystems Technology Laboratories from 2006 to 2011. Since July 2011, he is the Head of the MIT EECS Department


June
A Seminar on Using Buffering for Resource-Efficient Storage and Aggregation
Orgaized by PragaTI (TI India Technical University), in cooperation with IEEE CAS Bangalore Chapter and IEEE Bangalore Section
Speaker: Dr. Hrishikesh Amur (Software engineer, Google)
Date: 23 June, 2016
Time: 3.00PM to 4.00PM
Venue: Texas Instruments India, Bagmane Tech Park, CV Raman Nagar, Bangalore 560093

Registration: There is no fee to attend this seminar and is open to all. Please fill out the online registration form at https://docs.google.com/forms/d/1s1gFgpT0_f2zLZkqi9RB1s6dhBLOTBCXHBFpdH4oeW0/viewform?c=0&w=1&usp=mail_form_link before June 20. Registration will be confirmed through e-mail. Please take your seat a few minutes before the seminar begins, and sign the attendance sheet & fill out the feedback form.
Seats are limited. Light refreshments will be served at the end of the seminar.

Abstract: Recent years have witnessed a rapid growth in the popularity of fast analytics systems, which exemplify a trend where queries, that previously involved batch-processing (e.g., running a MapReduce job) on a massive amount of data, are increasingly expected to be answered in near real-time with low latency. In this talk, I will address the problem that existing designs for various components used in the software stack for DISC systems do not meet the requirements demanded by fast analytics applications. I focus specifically on two problems:
1. Key-value storage: Fast analytics applications require that new data entering the system (e.g., new web-pages crawled, currently trending topics) be quickly made available to queries and analysis codes. Therefore, along with fast reads, storage systems must also support writes with high throughput, which current systems fail to do. In the first part of this work, we solve this problem by proposing a new key-value storage system -- called the Write Buffer (WB) Tree -- that provides nearly 30x higher write performance and similar read performance compared to current high-performance systems.
2. GroupBy-Aggregate: Fast analytics systems require support for fast, incremental aggregation of data for with low-latency access to results. Since existing techniques are memory-inefficient, in the second part of this talk, I will discuss a new data structure called the Compressed Buffer Tree (CBT) to implement memory-efficient in-memory aggregation.

Dr. Hrishikesh AmurAbout the speaker: Dr. Hrishikesh Amur is a software engineer at Google. He obtained his Ph.D. from the School of Computer Science at Georgia Tech. under the guidance of Dr. Karsten Schwan. He has published 15 papers in leading ACM/IEEE conferences and journals. His interests broadly include operating systems and distributed systems. His doctoral work focused on achieving energy efficiency in distributed file systems.



1. IEEE CAS: Full-day Tutorial on C and Code Composer Studio
Conducted by IEEE CAS Bangalore Chapter in association with Texas Instruments, India
Instructor: Dr. C.P. Ravikumar (TI India)
Date: 11 June, 2016 (Saturday)
Time: 9.30AM - 5.00PM
Venue: Texas Instruments India, Bagmane Tech Park, CV Raman Nagar, Bangalore 560093

Registration: The program is open only to students and teachers of engineering colleges. Please fill out the online registration form at https://docs.google.com/forms/d/1FkjoLOU1hXxRff5RBotIQ6LVdEYnHKSov_2uZEMr8fI/viewform?c=0&w=1 by June 4. There is a nominal fee of Rs 750/- to attend the event. If you are a member of IEEE, you may register at a discounted fee of Rs 500/-. Payment should be made by cheque/DD in the name name of "IEEE CAS Bangalore Chapter" payable in Bangalore. Confirmation will be sent by e-mail to participants by June 5. Registration fee includes working lunch, refreshments and a participation certificate.

Abstract: There are two parts to this tutorial. In the first half, we will conduct a refresher training on C programming with illustrative exercises to touch upon the following topics:

  • Data Structures using C
  • Dynamic memory allocation
  • C library functions
  • Debugging C programs
  • In the second half, we will cover aspects of embedded computer architecture and illustrate the use of Code Composer Studio from Texas Instruments to carry out C and Assembly-Language programming on TIVA C-series Launchpad. The TIVA Launchpad is based on ARM Cortex-M4.
    Pre-requisites: The student is expected to have exposure to C programming and digital computer organization.

    About the instructor: Dr. C.P. Ravikumar is the Director of Technical Talent Development at Texas Instruments, India. He is also an adjunct faculty in the Department of Electrical Engineering at IIT Delhi. Before joining TI, he was a Professor in the Department of Electrical Engineering at IIT Delhi. His princiipal areas of research interest are VLSI architecture, embedded systems, and electronic design automation. He has published over 200 papers in international conferences and journals. He has won 3 best paper awards in IEEE conferences and has 3 US patents to his credit. He has edited 15 books in the areas of VLSI design and Embedded Systems.
    He has delivered keynote talks and tutorials in reputed national as well as international conferences. He has delivered over 200 seminars in engineering colleges across India. He is a senior member of IEEE, Fellow of the Indian Microelectronics Society, and the past secretary of VLSI Society of India. He established VLSI Design and Test Symposium and served as its General Chair for 15 years.
    He has served on the organizing committees of numerous conferences in various capacities. C.P. Ravikumar has served on the ediorial the associate editor of "IEEE Transactions on Circuits and Systems" (2014-2015). He is the current Honorary Secretary of IEEE CAS Society, Bangalore Chapter.


    MAY
    A One-day training on IEEE CAS : Introduction to Verilog
    Conducted in cooperation with Texas Instruments (India) by IEEE CAS Society, Bangalore Chapter
    Instructor: C.P. Ravikumar
    Date: Saturday, May 21, 2016
    Time: 9.30 AM - 5.00 PM
    Venue: Texas Instruments India, Bagmane Tech Park, CV Raman Nagar, Bangalore 560093

    In cooperation with Texas Instruments (India), IEEE CAS Society, Bangalore Chapter is holding a One-day class on Verilog HDL on Saturday, May 21st, This training is only open to students and teachers. Priority will be given to IEEE and/or IEEE CAS members. Limited seats are available.

    Registration: Register online no later than 5.00pm on May 19. Confirmation will be sent by 12.00 noon on May 20. There is a nominal fee to participate (Rs 500/- for students/teachers who are members of IEEE, and Rs 750/- for others). The fee includes lunch and refreshments and a participation certificate. Your participation will be confirmed and further instructions will be sent.

    About the Course: In this introductory class, the participants will be exposed to topics in Digital Design and Verification through Verilog Hardware Description Language. The class will consist of lectures, demos, and hands-on exercises. It is assumed that the participant has some knowledge of digital design and verification. Topics which we plan to cover are:

  • Revisiting Verilog HDL
  • Modeling hardware at behavioral/structural level
  • Writing hardware descriptions
  • Writing testbenches and performing simulations
  • About the instructor: Dr. C.P. Ravikumar is with Texas Instruments India as a Senior Technologist in VLSI Test. Before joining TI, he served on the faculty of the Department of Electrical Engineering at IIT Delhi as a Professor. He has published over 150 papers in international conferences and journals. He has served as the technical program chair for VLSI Design Conference and the VLSI Design and Test Symposium. He has also served as the member of the program committee for several conferences, including HiPC (High Performance Computing).
    He is the recipient of SIGDA student scholarship award, best paper award (VLSI Design conference) and best student paper award (VLSI Design conference). He is a senior member of IEEE, Fellow of the Indian Microelectronics Society, and the past secretary of VLSI Society of India. C.P. Ravikumar is the associate editor of "IEEE Transactions on Circuits and Systems" (2014-). He is the current Honorary Secretary of IEEE CAS Society, Bangalore Chapter.


    April
    2. A Seminar on Exploring challenges and resolutions to enable software power management for ADAS applications
    Orgaized by IEEE CAS Bangalore Chapter. In cooperation with IEEE Bangalore Section and Texas Instruments, India
    Speaker: Piyali Goswami (TI India)
    Date: 20 April, 2016
    Time: 3.00 PM - 4.00 PM
    Venue: Texas Instruments India, Bagmane Tech Park, CV Raman Nagar, Bangalore 560093

    Registration: There is no fee to attend this seminar, but your must pre-register. Your participation will be confirmed by e-mail. Provide an e-mail address that you check regularly. Please enrol only if you are seriously interested in participating.
    Please fill out the online registration form at https://goo.gl/Oe1kcC. Registration closes on Apr 13 - you will receive confirmation by Apr 15.

    Abstract: Smaller size and higher PCB integration are driving strict constraints for thermal dissipation and power consumption of main processing SoCs targeted for Advanced Driver Assistance (ADAS) systems. Designing ADAS systems for worst-case power dissipation is prohibitively expensive. Current ADAS systems use device shutdown as a response to high temperature. Considering driver safety, loss of functionality at high temperatures can be detrimental. Software solutions are becoming more and more important to curtail power consumption and ensure the device is able to perform minimal critical functions at high temperatures. ADAS customers build their software stack using RTOS or no operating system.
    In this seminar, we take you through the story of software entitlement of PRCM features using an OS-independent power management software driver, and integrating it with the Vision SDK framework. We describe solutions to abstract PRCM hardware programming complexities at the driver level. We highlight framework challenges and resolutions when integrating power management with Vision SDK which is based on TI RTOS/SysBIOS. At the application level, we describe techniques to implement advanced power management features like Limp Home mode, and dynamic power down and power up of DSPs and EVEs. We highlight important aspects to consider power management with Linux + Vision SDK. We demonstrate up to 50 % reduction in device power consumption across all Vision SDK based ADAS applications on TI devices at room temperature. Multiple ADAS customers are seeing the value of these techniques and are going into production by incorporating them.

    About the speaker:
    Piyali Goswami is with the Automotive ADAS Software and AVV team. Her current activities include developing power management software for ADAS TDAxx devices and assisting customers optimize system level power consumption and resolve system level performance bottlenecks. In the past, she has been involved in performance characterization and silicon validation of DM814x, DM385 and TDAxx devices, and software codec development for IVA-HD2.
    She joined Texas Instruments in 2010. She received her B.Tech in Electronics & Communication from NIT, Surathkal and her Master's degree in Software Systems from BITS, Pilani.

    1. ANALOG DAY
    Get to know the industry trends in analog and mixed-signal design from experts in the field!
    Orgaized by IEEE CAS Bangalore Chapter. In cooperation with IEEE Bangalore Section and Texas Instruments, India
    Speakers: Nagarajan Viswanathan, Shagun Dusad, G. Santhosh Kumar and K Radhakrishna Rao (TI India)
    Date: April 2, 2016
    Time: 9.30 AM - 5.00 PM
    Venue: Texas Instruments India, Bagmane Tech Park, CV Raman Nagar, Bangalore 560093

    Registration: This event is mainly intended for teachers and Masters/Ph.D. students with specialization in Analog. Limited seating available. Please fill out the online registration form before Mar 24.
    Registration will be confirmed through e-mail before March 28. Priority will be given to faculty members and Ph.D. students who are members of IEEE. Limited seating is available.
    A notional registration fee will be applicable. For faculty members and MS/Ph.D. students this fee is Rs. 750/- and is payable by cheque to IEEE CAS Bangalore Chapter.
    The cheque must be sent by mail to: C.P. Ravikumar, Texas Instruments, Bagmane Tech Park, CV Raman Nagar, Bangalore 560093 to reach before Mar 29.
    For faculty and students who are members of IEEE, the discounted fee is Rs. 500/-. Registration fee covers a working lunch, coffee, and a certificate of participation.

    Agenda:

    Introduction
    Architecture Techniques to push Speed Envelope and Linearity of High Performance ADCs
    Speakers: Nagarajan Viswanathan and Shagun Dusad
    Demo
    Speakers: Nagarajan Viswanathan and Shagun Dusad
    High performance Bandpass Delta-Sigma ADC for MRI application
    Speaker: G. Santhosh Kumar
    Analog System Design – Session I & Session II
    Speaker: K Radhakrishna Rao

    Nagarajan Viswanathan:
    Nagarajan Viswanathan received B.Tech. degree in Electrical Engineering from Coimbatore Institute of Technology in 2002 and joined the High Performance Analog team at Texas Instruments. He is a Distinguished Member Technical Staff in the High Performance and High Speed Converters group at Texas Instruments, Bangalore. He is an expert in Analog hardware, Communications and Signal Processing and has led key innovations to improve linearity in High Speed Analog to Digital Converters, improve resolution of fault detection in Optical Time Domain Reflectometry systems and designed measurement techniques to enable the possibility of high performance testing at low cost. He has ten patents (six from USPTO) and published over 15 technical papers.

    Shagun Dusad:
    Shagun Dusad received B.Tech. degree in Electrical Engineering from IIT Bombay in 2006 and joined the High Performance Analog team at Texas Instruments . He is currently a Member Technical Staff in the High Performance and High Speed Converters group at Texas Instruments, Bangalore.
    He is an expert in Analog circuits and signal chain for ultra sound and MRI systems. He has led key innovations in High Speed GHz Analog to Digital Converters, low power and high performance analog front end for ultra sound and MRI systems. He is an expert in pipeline and sigma delta ADCs and in low noise amplifier circuits. He has seven granted patents at USPTO.

    Santhosh Kumar G:
    Santhosh Kumar G is with Texas Instruments as part of the High Performance Analog design team. He received M.Tech degree from IIT Bombay in the year 2010. During M.Tech, he published an IEEE paper that appeared in MWSCAS, and holds an US patent.
    He has been with the "High Performance Analog – Medical group" since 2010, and has worked on "Modelling, design & debug of Delta-Sigma ADC for MRI application". In addition, he has also worked on evaluation of "Delta-Sigma ADC design for ultrasound application".

    K Radhakrishna Rao:
    K Radhakrishna Rao is with Texas Instruments for the past 10 years as a part of the talent development team. Prior to joining TI, he spent over 30 years at IIT Madras as part of the faculty of Electrical Engineering Department.
    He has published numerous papers in the area of pure analog design. He has taught a number of courses related to analog design both at IIT Madras and Texas Instruments. At TI, he helped design the Analog System Lab Kit and coauthored the "Analog System Lab Manual" which are popularly used in engineering colleges across the world. He has recorded several popular video courses for NPTEL in the area of analog circuit design.


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