IEEE - CAS Bangalore Chapter, India     CAS Chapter - Region 10
Institute of Electrical and Electronics Engineers - Circuits and Systems Society
Goals: To conduct seminars, workshops, and other events pertaining to all aspects of electronic circuits and systems

Event Reports - 2016
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December
A Hands-on Approach to Design and Verification of Analog and Digital circuits
December 22-23, 2016
Texas Instruments India, Bangalore Campus
Report by C.P.Ravikumar ... Photos

dvadc-dec16 A Two-day event under the "Faculty Development Program" entitled A Hands-on Approach to Design and Verification of Analog and Digital circuits was organized by IEEE CAS Bangalore Chapter in cooperation with PragaTI (TI India Technical University) on December 22-23, 2016 at Texas Instruments India, Bangalore Campus. Dr.C.P.Ravikumar (TI India) conducted the training with other professionals from the industry.

The event was intended for faculty, students, research scholars and working professionals who are teaching a course on Electronic Circuits for the first year undergraduate students or a similar course, and who have a background on circuit theorems and basic circuit analysis. The participants were expected to have taken a course on electronic devices/circuits and digital design.

The basic intention of the program was to enable contributing effectively in the role of an electronics professional as it is important to have a firm grounding of basics, since not having a firm footing on foundations will be a handicap no matter how advanced your projects are. The program got into the basics of circuit design and verification with a hands-on approach to delve into these topics with a problem-solving approach to revise fundamentals. QUCS (Quite Universal Circuit Simulator) tool was used for the teaching.

We had around 16 participants including some IEEE members with positive feedback and suggestions:

  • Workshop was good but could have been extended to cover more circuits.
  • Some concepts on control theory and signals and system would have been helpful, with more examples on timing analysis of digital circuit.
  • Both analog and digital circuits nicely explained with the help of QUCS tool.
  • Include hardware demo besides simulation with more resource persons to interact.
  • Learned a new tool. Useful for academic, but include Root Locus & Smith chart.
  • Very well organized and useful.
  • More focus on verification of digital circuits required with simple digital examples.
  • Workshop was nice, but create an opportunity to do hands-on on hardware components to do a small project in the future.
  • Introduction to QUCS was really useful. Include some hands-on exercises.
  • Training covered a wide variety of circuits and was very enjoyable.
  • It was informative but should include application oriented simulations and some hardware implementation.
  • It was informative and very helpful to teachers/trainers in basic electronics. The trainer was very knowledgeable and inspiring.
  • Liked the aspect of how to teach in the class with free open source tools, and to give more knowledgeable questions to the students. The quality of training is good and we need more training like this related to teaching and research.
  • Very useful, exposing to the advanced simulations tool which helped in getting improved.

  • Some of the participants requested similar training on System Verilog and Wireless communications in the future.

    I N D E X   T O P November
    A Seminar entitled Updates from Embedded Systems Week 2016 conference
    4 November 2016
    Texas Instruments India, Bangalore Campus
    Report by C.P.Ravikumar ... Photos

    embsys-nov16 A Seminar entitled Updates from Embedded Systems Week 2016 conference was conducted in cooperation with PragaTI (TI India Technical University) and IEEE CAS Bangalore Chapter on 4 November 2016 at Texas Instruments India, Bangalore campus. Dr.C.P. Ravikuamar of TI India was the invited speaker.

    C.P. Ravikumar discussed his key take-aways from the Embedded Systems Week 2016 conference (ESWEEK) which was held in Pittsburgh, Pennsylvania, during Oct 2-7, 2016. He discussed the following topics:
    (a) Security of IoT: This was a recurrent theme in the conference and many speakers addressed the issue of security and privacy of the Internet where things such as refrigerators and washing machines can be part of the network. Several security breaches and cyber-attacks have occurred in the recent past which have made use of the vulnerability of the IoT. Ravikumar provided an overview of IoT and these vulnerabilities and went over some emerging solutions to secure the IoT.
    (b) Approximate Computing: Approximate computing may be a way to bring the cost and power dissipation down in applications where approximations in computing may be tolerable e.g. image and speech processing, computer vision, etc. Approximate computing was the topic of a keynote talk at EMSOFT 2016, given by Prof. Kaushik Roy. Ravikumar summarized the keynote talk.
    (c) Learning from Life: Dr Louis Sheffer's keynote talk at EMSOFT 2016 was about lessons that we can draw from life. Biomimicry has been used in creating airplane wings, cameras and many other products. There are many efforts to try and understand the structure and functioning of the brain of small animals. However, these studies can be very data-intensive and need efficient algorithms.

    The seminar was open to anyone interested, and the participants included some IEEE members.

    I N D E X   T O P October
    A Seminar entitled Advanced Light Control Applications using DLP® MEMS Devices
    20 October 2016
    Seminar Hall, DESE, Indian Institute of Science, Bangalore
    Report by C.P.Ravikumar ... Photos

    dlp-20oct16 A Seminar entitled Advanced Light Control Applications using DLP® MEMS Devices was organized by IEEE CAS Bangalore Chapter in cooperation with IEEE Bangalore Section, Indian Institute of Science and Texas Instruments India on 20 October 2016 at Seminar Hall, DESE, Indian Institute of Science, Bangalore. Sanjeev Kumar M & Sreeram Subramanian of TI India were the invited speakers. Dr.KRK Rao, TI India introduced the speakers to the audience.

    The speaker Sanjeev Kumar M began by highlighting the fact that "Digital Micromirror Devices" (DMD) were the first MEMS devices invented at Texas Instruments in 1987. He gave a brief summary of DLP® (Digital Light Processing) chip having been introduced by Texas Instruments, and that its first application was in the area of overhead projectors, and the way DLP projectors have revolutionized cinema since then. He also mentioned on both the DLP chip and its inventor Dr. Hornbeck having been awarded Oscars for the impact this technology has had on motion pictures. DLP projectors are now routinely used in showbiz, including the opening and closing ceremonies of Olympic games. He also noted that numerous innovative applications of DLP chips have emerged in the last decade, including medical applications, computer vision, 3-D cinema, volumetry, and so on. He gave an overview of what DLP® devices are and how they function.
    Sreeram Subramanian continued with a designer's perspective and discussed various parameters to consider when choosing a DLP® device for a specific application. The talk provided examples of various applications where DLP devices are deployed, and familiarized the audience with the various EVMs and tools that Texas Instruments makes and are available on ti.com that can be used to evaluate and prototype applications based on DLP.

    We had around 25 participants including some IEEE members. The seminar ended with an interaction by the speakers with the audience who are interested in using DLP in innovative projects.

    September
    A One-day Workshop entitled Understanding MSP430 Architecture using MSP430 Launchpad
    24 September, 2016
    Texas Instruments India, Bangalore Campus
    Report by C.P.Ravikumar ... Photos

    msp430-sep16 A One-day Workshop entitled Understanding MSP430 Architecture using MSP430 Launchpad was organized by IEEE CAS Bangalore Chapter in cooperation with Texas Instruments (India) on 24 September, 2016 at the Texas Instruments, Bangalore campus. Dr.C.P.Ravikumar (Texas Instruments, India) conducted the workshop as the instructor.

    The one-day program intended for teachers from engineering colleges aimed at using the MSP430 launchpad to understand the internal architecture of the MSP430 microcontroller. The first half of the class covered an overview of MSP430 architecture, and the second half included hands-on exercises using MSP430 launchpad and Code Composer Studio. Both C and assembly language programming were covered. While the workshop was mainly intended for teachers, it was open to research scholars and M.Tech students.

    The tutorial covered: Changing face of VLSI Architecture, Microcontrollers/DSP/Microprocessors, RISC/CISC architectures, SOC Platforms, MSP430 CPU Architecture, IO Interfaces supported by MSP430, Instruction set of MSP430 and Assembly language programming using MSP430 and TI's Code Composer Studio.

    I N D E X   T O P July
    A Refresher Course on Basic Electronics for ENGINEERING Teachers
    July 16 & 23, 2016
    Texas Instruments India, Bangalore Campus
    Report by C.P.Ravikumar ... Photos

    beet-july16 A Refresher Course entitled Basic Electronics for ENGINEERING Teachers was organized by IEEE CAS Bangalore Chapter in association with Texas Instruments (India) on July 16 & 23, 2016 at Texas Instruments, Bangalore campus. Dr.C.P.Ravikumar was the instructor.

    The course was split into two modules: Day-I: Network Theory and Analog Electronics (on July 16) and Day-II: Digital Electronics (on July 23)

    The course was intended for young faculty who are teaching / planning to teach a basic course on electronics to undergraduate students. Research Scholars who are planning to apply to take up an academic career were also eligible to attend. The purpose of the course was to provide a quick overview of important concepts and lay emphasis on what is important from an industry perspective. Problem solving and discussions were also part of the course, and aspects of soft skills for new teachers were also discussed.

    We had around 8 participants including some IEEE members for each module.

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    A Seminar entitled Ultra-low-Power System Design for Internet of Everything
    7 July 2016
    Texas Instruments India, Bangalore Campus
    Report by C.P.Ravikumar ... Photos

    ulp-iot-july16 A Seminar entitled Ultra-low-Power System Design for Internet of Everything was Conducted by PragaTI (TI India Technical University) in association with IEEE CAS Bangalore Chapter on 7 July 2016 at Texas Instruments, Bangalore campus.
    Anantha P. Chandrakasan was the invited speaker. He is the Head of the MIT EECS Department, and also holds additional posts as Vannevar Bush Professor of Electrical Engineering and Computer Science and Department Head, MIT Electrical Engineering and Computer Science

    The speaker, a well-known educator focuses his studies towards advances in energy-efficient circuit and system design that have enabled sensor nodes to be embedded in virtually everything - from devices implanted in the human body to sensors seamlessly integrated in the environment. These systems have made an impact on important applications including medical monitoring, assistive devices, personal safety, energy management, and secure information access. For example, a Time-of-Flight camera coupled with a vision processor can detect obstacles and greatly enhance the environment awareness for the visually impaired. A system-level view is needed to minimize energy consumption of sensing, processing, energy conversion, and communication. Energy savings is achieved through the use of data statistics in adapting computation, dedicated architectures, parallelism and ultra-low-voltage operation, deep learning techniques, and effective duty cycling. Energy harvesting should be an integral part of the sensor design including the use of biological sources when appropriate.

    He obserbved that the Emerging device solutions such as devices with Molybdenum Disulfide or hybrid cell based systems will provide unique capabilities in realizing the vision of Internet of Everything. The talk ended with discussions on energy reduction techniques or using low-power, and also present the challenges ahead including the need for efficient security solutions.

    We had a full-house including some IEEE members.

    I N D E X   T O P June
    A Seminar entitled Using Buffering for Resource-Efficient Storage and Aggregation
    23 June, 2016
    Texas Instruments India, Bangalore Campus
    Report by C.P.Ravikumar ... Photos

    storage-june16 A Seminar entitled Using Buffering for Resource-Efficient Storage and Aggregation was organized by PragaTI (TI India Technical University), in cooperation with IEEE CAS Bangalore Chapter and IEEE Bangalore Section on 23 June, 2016 at Texas Instruments, Bangalore campus. Dr. Hrishikesh Amur (Software engineer, Google) was the invited speaker.

    The speaker pointed out that in the recent years there has been a rapid growth in the popularity of fast analytics systems. They in turn exemplify a trend where queries, that previously involved batch-processing (e.g., running a MapReduce job) on a massive amount of data, are increasingly expected to be answered in near real-time with low latency. The speaker focused on addressing the problem whereby existing designs for various components used in the software stack for DISC systems do not meet the requirements demanded by fast analytics applications. The two specific problems were addressed by proposing: Key-value storage and GroupBy-Aggregate approaches.

    Considering tht fast analytics applications that require new data entering the system (e.g., new web-pages crawled, currently trending topics) to be quickly made available to queries and analysis codes requiring fast reads, storage systems must also support writes with high throughput, which current systems fail to do. Key-value storage system was hence proposed (called the Write Buffer/WB Tree) that provides nearly 30x higher write performance and similar read performance compared to current high-performance systems.

    Considering that Fast analytics systems require support for fast, incremental aggregation of data for with low-latency access to results, and since the existing techniques are memory-inefficient, the speaker discussed a new data structure called the Compressed Buffer Tree (CBT) to implement memory-efficient in-memory aggregation.

    We had around 13 participants including some IEEE members.

    I N D E X   T O P May
    A One-day training entitled IEEE CAS : Introduction to Verilog
    May 21, 2016
    Texas Instruments India, Bangalore Campus
    Report by C.P.Ravikumar ... Photos

    verilog-may16 A One-day training entitled IEEE CAS : Introduction to Verilog was organized by IEEE CAS Society, Bangalore Chapter in cooperation with Texas Instruments (India) on May 21, 2016 at Texas Instruments, Bangalore campus. C.P.Ravikumar conducted the training as the instructor.

    The training was mainly inteneded for students and teachers with a basic background of Verilog HDL. In the introductory class, the participants were exposed to topics in Digital Design and Verification through Verilog Hardware Description Language with hands-on exercises. The training covered: Revisiting Verilog HDL, Modeling hardware at behavioral/structural level, Writing hardware descriptions, and Writing testbenches and performing simulations

    We had around 16 participants including some IEEE members who provoded positive feedback.

    April
    A Seminar entitled Exploring challenges and resolutions to enable software power management for ADAS applications
    April 20, 2016
    Texas Instruments India, Bangalore Campus
    Report by C.P.Ravikumar ... Photos

    adas-apr16 A Seminar entitled Exploring challenges and resolutions to enable software power management for ADAS applications was organized by IEEE CAS Bangalore Chapter, in cooperation with IEEE Bangalore Section and Texas Instruments, India on April 20, 2016 at Texas Instruments, Bangalore campus. Piyali Goswami of TI India was the invited speaker.

    The seminar focused on the smaller size and higher PCB integration that drive strict constraints for thermal dissipation and power consumption of main processing SoCs targeted for Advanced Driver Assistance (ADAS) systems. The speaker opined that designing ADAS systems for worst-case power dissipation is prohibitively expensive as the current ADAS systems use device shutdown as a response to high temperature. Considering driver safety, loss of functionality at high temperatures can thus be detrimental. The speaker stressed on software solutions becoming more and more important to curtail power consumption to ensure that the device is able to perform minimal critical functions at high temperatures. ADAS customers, as was noted, build their software stack using RTOS or no operating system.

    The seminar began with the story of software entitlement of PRCM features using an OS-independent power management software driver, and integrating it with the Vision SDK framework. Solutions to abstract PRCM hardware programming complexities at the driver level were described. It also highlighted framework challenges and resolutions when integrating power management with Vision SDK which is based on TI RTOS/SysBIOS. At the application level, techniques to implement advanced power management features like Limp Home mode, and dynamic power down and power up of DSPs and EVEs were described. It also highlighted the important aspect of considering power management with Linux + Vision SDK. The speaker also demonstrated about the 50 % reduction achieved in device power consumption across all Vision SDK based ADAS applications on TI devices at room temperature, and pointed that multiple ADAS customers are seeing the value of these techniques and are going into production by incorporating them.

    The program was open to all and we had around 10 participants including some IEEE members. Many found the talk being very informative. Particularly those who had studied AUTOSAR architecture in detail mentioned having got an opportunity to explore more about ADAS, and wished for more such seminars in the future.

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    A One-day event: IEEE-CAS Analog Day
    2 April, 2016
    Texas Instruments India, Bangalore Campus
    Speakers: Nagarajan Viswanathan, Shagun Dusad, G. Santhosh Kumar and K Radhakrishna Rao (TI India)
    Report by C.P.Ravikumar

    analog-apr16 A One-day event entitled IEEE-CAS Analog Day was organized by IEEE CAS Bangalore Chapter in cooperation with IEEE Bangalore Section and Texas Instruments, India on 2 April, 2016 at Texas Instruments, Bangalore campus. The event was mainly intended for teachers and Masters/Ph.D. students with specialization in Analog.

    The program began with an Introduction highlighting Architecture Techniques to push Speed Envelope and Linearity of High Performance ADCs by Nagarajan Viswanathan and Shagun Dusad. This was followed by a Demo conducted by Nagarajan Viswanathan and Shagun Dusad.

    The next session entitled High performance Bandpass Delta-Sigma ADC for MRI application was by G. Santhosh Kumar.
    The concluding two sessions, post-lunch, were conducted by Dr.K Radhakrishna Rao on various aspects of Analog System Design. All the speakers were from Texas Instruments India, and specialists in the field.

    The main intent of the program was to make the participants "get to know the industry trends in analog and mixed-signal design from experts in the field". We had around 18 participants with the most of them being IEEE members, and the feedback has been excellent.

    The participants received as return gifts hardcopies of the proceedings of several leading conferences in the area of VLSI Design and Test. Breakfast, Lunch, and Tea/Coffee were served to all participants.

    I N D E X   T O P
    January
    The second International conference on VLSI SATA (VLSI Systems, Architecture, Technology and Applications)
    January 10-12, 2016
    Amrita Vishwa Vidya Peetham (University), School of Engineering, Bengaluru Campus
    Report by C.P.Ravikumar

    The second international conference on VLSI SATA (VLSI Systems, Architecture, Technology and Applications) was held during January 10-12, 2016. The event was organized by the Dept of Electronics and Communication Engineering & Department of Computer Science & Engineering, Amrita Vishwa Vidya Peetham (University), School of Engineering, Bengaluru Campus. IEEE-CAS Society, Bangalore Chapter was a technical co-sponsor along with IEEE Bangalore Section, IETE, and VLSI Society of India.

    The conference theme was "System Solutions for Emerging Applications" that aimed to provide a common platform for discussing broader VLSI topics to better understand the integration of VLSI circuits and systems for today's emerging applications. The three-day event comprised key note addresses, technical sessions, invited talks and contributed paper presentations, along with tutorials and industry exhibits from sponsoring partners. Around 39 selected papers were presented under parallel technical sessions in three tracks: Systems and Architecture, Technology, and Applications.

    Dr.Joseph Hausner (Vice President R&D, Intel Mobile Communications, Munich, Germany) delivered the inaugural Keynote titled "5G Communication: Vision and Implication on Wireless and Silicon Technologies". The other keynote talks were "Hardened, Low-Power Communication Links: VLSI Design in Extreme Environments" by Prof.Forrest Brewer (University of California, Santa Barbara, USA), "Emerging Trends in Automotive Electronics by Vinay Shenoy (Managing Director, Infineon Technologies, India and Chairman, IESA), and a talk by Mahindra (COMVIVA).

    The event was well attended by both the academy and industry participants.

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